Preprint available as parallelizing_models_jnm2008.pdf
Shows how to revise network models so that they will run and produce numerically identical results on either serial or parallel hardware. This allows model development and debugging to be done on readily available local resources, producing code that will run without modification on any single- or multicore PC or Mac, workstation cluster, or parallel supercomputer.
Translating network models to parallel hardware in NEURON
| Title | Translating network models to parallel hardware in NEURON |
| Publication Type | Journal Article |
| Year of Publication | 2008 |
| Authors | Hines, M. L., and Carnevale N. T. |
| Journal | Journal of neuroscience methods |
| Volume | 169 |
| Pagination | 425–455 |
| Keywords | Computational neuroscience; Network model; Simulation; NEURON simulation environment; Serial computation; Parallel computation; Multiprocessor; Parallel supercomputer |
| Abstract | The increasing complexity of network models poses a growing computational burden. At the same time, computational neuroscientists are finding it easier to access parallel hardware, such as multiprocessor personal computers, workstation clusters, and massively parallel supercomputers. The practical question is how to move a working network model from a single processor to parallel hardware. Here we show how to make this transition for models implemented with NEURON, in such a way that the final result will run and produce numerically identical results on either serial or parallel hardware. This allows users to develop and debug models on readily available local resources, then run their code without modification on a parallel supercomputer. |
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